Author :
Castro, H.A. ; Augustine, K. ; Balasubrahmanyam, S. ; Bressie, T.J. ; Chandramouli, S. ; Christensen, G.V. ; Dayley, M.G. ; Elmhurst, D.R. ; Fan, K. ; Goldman, M. ; Haid, C. ; Haque, R. ; Ishac, M.I. ; Khandaker, M.M. ; Kreifels, J.A. ; Li, B. ; Loe, K.D.
Author_Institution :
Intel Corp., Folsom, CA, USA
Abstract :
We describe the design of a high performance 2 bits per cell flash memory device capable of 8ns synchronous access rate capable of operation at up to 125MHz in burst mode and asynchronous page mode access rate of 14ns. The device is fabricated on Intel´s 0.18/spl mu/m ETOX/spl trade/ VII Process technology.
Keywords :
cellular arrays; flash memories; integrated circuit design; 0.18 micron; 125 MHz; 128 Mbit; 14 ns; 8 ns; ETOX VII Process technology; access rate; asynchronous page mode; burst mode; design; flash memory; synchronous access rate; Audio recording; Circuits; Cities and towns; Costs; Decoding; Flash memory; Logic design; Logic devices; Logic testing; USA Councils;
