New Cell Structure with Edge-thick Tunnel Oxide for Highly Reliable NAND Flash Memory Devices

Author

Tae-Kyung Kim ; Jaihyuk Song ; Changsub Lee ; Dongyean Oh ; Taeseok Jang ; Jongkwang Lim ; Dongjun Lee ; Seungjun Lee ; Minhwan Lim ; Hyunyoung Shim ; Bongtae Park ; Man-Ki Lee ; Hunkook Lee

Author_Institution

Semicond. Res. Center, Samsung Electron. Co. Ltd., Gyeonggi

fYear

2006

fDate

12-16 Feb. 2006

Firstpage

38

Lastpage

39

Abstract

One of the most important performances of NAND flash memory is reliability characteristics, such as program/erase cycling and data retention. Tunnel oxide quality is essential to the reliability and it is well known that tunnel oxide degradation during FN (Fowler-Nordheim) stress is due to the oxide trap and interface trap generation. It is believed that trapping mainly occurs where tunnel oxide is locally thin. For example, conventional SAP (self-aligned poly) process with shallow trench isolation, tunnel oxide at active edge is necessarily thinner than active channel. In this paper, we proposed a new process scheme to fabricate optimized tunnel oxide thickness varying from active center to edge, and we confirmed the improvement of reliability characteristics such as Vth shift and interface trap density during endurance cycling

Keywords

NAND circuits; circuit reliability; electron traps; flash memories; interface phenomena; tunnelling; Fowler-Nordheim stress; NAND flash memory devices; cell structure; data retention; edge-thick tunnel oxide; interface trap density; interface trap generation; oxide traps; program-erase cycling; self-aligned poly process; shallow trench isolation; Annealing; Degradation; Dielectrics; Electronic mail; Etching; Oxidation; Semiconductor device reliability; Silicon compounds; Stress; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Non-Volatile Semiconductor Memory Workshop, 2006. IEEE NVSMW 2006. 21st

Conference_Location

Monterey, CA

Print_ISBN

1-4244-0027-9

Type

conf

DOI

10.1109/.2006.1629484

Filename

1629484