Charge Trapping Memory Cell of TANOS (Si-Oxide-SiN-Al2O3-TaN) Structure Compatible to Conventional NAND Flash Memory

Author

Lee, Chang-Hyun ; Kang, Changseok ; Sim, Jaesung ; Lee, Jang-Sik ; Kim, Juhyung ; Shin, Yoocheol ; Park, Ki-Tae ; Jeon, Sanghun ; Sel, Jongsun ; Jeong, Younseok ; Choi, Byeongin ; Kim, Viena ; Jung, Wonseok ; Hyun, Chung-Il ; Choi, Jungdal ; Kim, Kinam

Author_Institution

Semicond. R&D Center, Samsung Electron. Co., Ltd., Yongin, GA

fYear

2006

fDate

12-16 Feb. 2006

Firstpage

54

Lastpage

55

Abstract

To realize TANOS-NAND flash memory, key requirements like program/erase speed, read retention, and program disturb window should be satisfied. In this work, we present 63 nm NAND-type TANOS cells to satisfy all the requirements and to replace floating-gate cells in conventional NAND flash memory without changing a circuit design and a sensing window

Keywords

aluminium compounds; electron traps; flash memories; silicon; silicon compounds; tantalum compounds; 63 nm; NAND-type TANOS cells; Si-SiO₂-SiN-Al₂O₃-TaN; TANOS-NAND flash memory; charge trapping memory cell; program disturb window; program-erase speed; read retention; Circuit synthesis; Electron traps; Flash memory; High-K gate dielectrics; Interference; Nonvolatile memory; Research and development; SONOS devices; Threshold voltage; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Non-Volatile Semiconductor Memory Workshop, 2006. IEEE NVSMW 2006. 21st

Conference_Location

Monterey, CA

Print_ISBN

1-4244-0027-9

Type

conf

DOI

10.1109/.2006.1629491

Filename

1629491