DocumentCode
1904251
Title
BIST: a test a diagnosis methodology for complex, high reliability electronics systems
Author
Pateras, Stephen ; McHugh, Patrick
Author_Institution
LogicVision, San Jose, CA, USA
fYear
1997
fDate
22-25 Sep 1997
Firstpage
398
Lastpage
402
Abstract
A test and diagnosis methodology that is based on built-in self-test(BIST) is defined and described. A BIST solution based on a maintainable system architecture is described that includes the technology, and tools needed for the development of chip, board, and system BIST. This architecture is based on the IEEE 1149.5 MTM-Bus at the backplane level and the IEEE 1149.1 (JTAG) Boundary Scan Architecture at the chip level
Keywords
IEEE standards; automatic test equipment; boundary scan testing; built-in self test; electronic equipment testing; integrated circuit testing; reliability; system buses; BIST; IEEE 1149.1 Boundary Scan Architecture; IEEE 1149.5 MTM-Bus; JTAG; backplane level; built-in self-test; chip level; complex systems; diagnosis methodology; electronics; reliability; Backplanes; Built-in self-test; Circuit testing; Computer architecture; Costs; Electronic equipment testing; Life testing; Software testing; System testing; Test equipment;
fLanguage
English
Publisher
ieee
Conference_Titel
AUTOTESTCON, 97. 1997 IEEE Autotestcon Proceedings
Conference_Location
Anaheim, CA
Print_ISBN
0-7803-4162-7
Type
conf
DOI
10.1109/AUTEST.1997.633652
Filename
633652
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