• DocumentCode
    1904338
  • Title

    A Self-Aligned Air Gap Interconnect Process

  • Author

    Chen, Hsien-Wei ; Jeng, Shin-Puu ; Tsai, Hao-Yi ; Liu, Yu-Wen ; Yu, CH ; Sun, YC

  • Author_Institution
    Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC), Hsinchu, Taiwan, R.O.C.
  • fYear
    2008
  • fDate
    1-4 June 2008
  • Firstpage
    34
  • Lastpage
    36
  • Abstract
    A self-aligned air gap interconnect structure with sidewall reinforcement is developed. The new structure lowers the capacitance of 0.09um/0.09um (w/s) metal wires by as much as 25%, and exhibits low leakage current. As compared to un-protected air gaps, the structure also greatly improves the electromigration resistance and the misalignment margin for unlanded vias. Furthermore, the sidewall protection layer strengthens the overall mechanical strength and increases the packaging reliability.
  • Keywords
    Air gaps; Capacitance; Dielectrics; Dry etching; Leakage current; Manufacturing processes; Protection; Resists; Semiconductor device packaging; Wet etching;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Interconnect Technology Conference, 2008. IITC 2008. International
  • Conference_Location
    Burlingame, CA, USA
  • Print_ISBN
    978-1-4244-1911-1
  • Electronic_ISBN
    978-1-4244-1912-8
  • Type

    conf

  • DOI
    10.1109/IITC.2008.4546917
  • Filename
    4546917