Title :
Low voltage and low power aspects of data converter design
Author_Institution :
Integrated Syst. Lab., Swiss Fed. Inst. of Technol., Zurich, Switzerland
Abstract :
Low voltage design is becoming an important issue for analogue circuits expected to operate at around 1 V supply voltage in sub-100 nm CMOS technologies. This contribution discusses the impact of low voltage on circuit architecture, opamp configuration to maintain speed and DC gain, common-mode feedback and its stability, switching speed, as well as trends in achievable signal to noise ratio and speed for a given power consumption.
Keywords :
CMOS integrated circuits; analogue-digital conversion; circuit feedback; circuit stability; low-power electronics; operational amplifiers; 1 V; 100 nm; A/D converters; CMOS; DC gain; common-mode feedback stability; low power data converters; low voltage data converters; operational amplifiers; signal to noise ratio; switching speed; Analog integrated circuits; CMOS analog integrated circuits; CMOS technology; Circuit stability; Feedback circuits; Integrated circuit technology; Laboratories; Low voltage; Threshold voltage; Transistors;
Conference_Titel :
Solid-State Circuits Conference, 2004. ESSCIRC 2004. Proceeding of the 30th European
Print_ISBN :
0-7803-8480-6
DOI :
10.1109/ESSCIR.2004.1356608
