DocumentCode
1904596
Title
Process Control and Physical Failure Analysis for Sub-100NM CU/Low-K Structures
Author
Zschech, Ehrenfried ; Huebner, Rene ; Potapov, Pavel ; Zienert, Inka ; Meyer, Moritz Andreas ; Chumakov, Dmytro ; Geisler, Holm ; Hecker, Michael ; Engelmann, Hans-Juergen ; Langer, Eckhard
Author_Institution
AMD Saxony LLC & Co. KG, Center for Complex Analysis, Wilschdorfer Landstrasse 110, D-01109 Dresden, Germany, Phone +49 351 277 4100, Fax +49 351 277 94100, Email ehrenfried.zschech@amd.com
fYear
2008
fDate
1-4 June 2008
Firstpage
67
Lastpage
69
Abstract
For successfully developing and controlling BEoL structures of the 32 nm CMOS technology node and beyond, advanced analytical techniques are needed for process development and control, for physical failure localization and analysis as well as for the investigation of reliability-limiting degradation mechanisms. These challenges are discussed from the point of view of a high volume leading-edge manufacturing.
Keywords
Bonding; CMOS technology; Copper; Degradation; Dielectric materials; Failure analysis; Microstructure; Plasma materials processing; Plasma measurements; Process control;
fLanguage
English
Publisher
ieee
Conference_Titel
Interconnect Technology Conference, 2008. IITC 2008. International
Conference_Location
Burlingame, CA, USA
Print_ISBN
978-1-4244-1911-1
Electronic_ISBN
978-1-4244-1912-8
Type
conf
DOI
10.1109/IITC.2008.4546927
Filename
4546927
Link To Document