DocumentCode
1904812
Title
Reconfigurable transputer processor architectures
Author
Nicole, Denis A.
Author_Institution
Dept. of Electron. & Comput. Sci., Southampton Univ., UK
Volume
1
fYear
1989
fDate
3-6 Jan 1989
Firstpage
365
Abstract
The author describes concurrent-processing computers capable of performance in the gigaflop (billions of floating-point operators) range on real scientific and engineering applications, which have ben developed as part of Esprit project 805. The architecture is readily scalable up to over a thousand processors and provides genuinely cost-effective computing on a worthwhile range of problems. Real-time applications are also supported, using optional high-bandwidth input-output facilities
Keywords
multiprocessor interconnection networks; parallel architectures; Esprit project 805; concurrent-processing computers; high-bandwidth input-output facilities; performance; reconfigurable transputer processor architectures; Application software; Computer aided manufacturing; Computer architecture; Computer networks; Computer science; Consumer electronics; Electromagnetic interference; High performance computing; Programming environments; Subcontracting;
fLanguage
English
Publisher
ieee
Conference_Titel
System Sciences, 1989. Vol.I: Architecture Track, Proceedings of the Twenty-Second Annual Hawaii International Conference on
Conference_Location
Kailua-Kona, HI
Print_ISBN
0-8186-1911-2
Type
conf
DOI
10.1109/HICSS.1989.47178
Filename
47178
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