Modeling the dynamic behavior of series-connected MOSFETs for delay analysis of multiple-input CMOS gates

Author

Bisdounis, L. ; Koyfopavlou, O.

Author_Institution

Dept. of Electr. & Comput. Eng., Patras Univ., Greece

Volume

6

fYear

1998

fDate

31 May-3 Jun 1998

Firstpage

342

Abstract

In this paper the dynamic behavior of series-connected MOSFETs is studied, in order to compute the propagation delay of multiple-input static CMOS gates. A method for the reduction of series-connected MOSFETs to a simple MOSFET with the same behavior is proposed. The effective width of the equivalent transistor is not constant as in some previous works. So all cases of input slopes, the load capacitance, the number and the position of the switching inputs, and the body effect, are considered in order to determine the equivalent transistor´s width. Along with the reduction process, an accurate analytical inverter timing model is used to compute the propagation delay of multiple-input static gates. The produced results are in very good agreement with SPICE simulations

Keywords

CMOS logic circuits; MOSFET; VLSI; circuit analysis computing; delays; digital simulation; integrated circuit modelling; logic CAD; logic gates; timing; analytical inverter timing model; body effect; delay analysis; dynamic behavior; equivalent transistor; input slopes; load capacitance; multiple-input CMOS gates; multiple-input static gates; propagation delay; reduction process; series-connected MOSFETs; switching inputs; Analytical models; Capacitance; Circuits; Inverters; MOSFETs; Propagation delay; SPICE; Semiconductor device modeling; Timing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on

Conference_Location

Monterey, CA

Print_ISBN

0-7803-4455-3

Type

conf

DOI

10.1109/ISCAS.1998.705281

Filename

705281