• DocumentCode
    1905153
  • Title

    A Smart Power Process in ``Direct-Bondedd´´ Silicon on Insulator with 150 V VDMOS, CMOS and Bipolar Transistors

  • Author

    Ifström, T. ; Apel, U. ; Graf, H.-G. ; Harendt, C. ; Höfflinger, B.

  • Author_Institution
    Institut fÿr Mikroelektronik Stuttgart, Allmandring 30 a, D-7000 STUTTGART 80, Tel. +49 711 6855900, Fax. +49 711 6855930
  • fYear
    1992
  • fDate
    14-17 Sept. 1992
  • Firstpage
    153
  • Lastpage
    156
  • Abstract
    Silicon direct bonding (SDB) has been used to produce silicon-on-insulator (SOI) substrates for dielectrically isolated power devices. The up-drain VDMOS transistors give a low specific on-resistance and allow multiple isolated outputs. The CMOS devices have down to 2 ¿m drawn channel lengths, here used in a channelless sea of gates semicustom array. The vertical NPN and lateral PNP transistors show characteristics comparable to those of a 60 V bipolar process and make advanced analogue functions possible. The presented process allows fabrication of a 2 A half-bridge circuit with integrated drivers and logic functions.
  • Keywords
    Bipolar transistors; CMOS process; Dielectric devices; Dielectric substrates; Fabrication; Power system reliability; Power transistors; Silicon on insulator technology; Threshold voltage; Wafer bonding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1992. ESSDERC '92. 22nd European
  • Conference_Location
    Leuven, Belgium
  • Print_ISBN
    0444894780
  • Type

    conf

  • Filename
    5435194