A Self-Isolated and Efficient Power Device for HVIC´s: RESURF LDMOS with SIPOS Layers

A junction termination technique, combining the effect of a semi-resistive layer with a RESURF structure is evaluated for a LDMOST by bidimensional numerical analysis. It is shown that the drawbacks inherent to the RESURF principle, mainly the sensitivity to technological parameters, are bypassed by using a semi-resistive layer. Quantitative analysis shows that the breakdown voltage can be kept at its optimal value even with commercial epitaxial wafer tolerances. The breakdown voltage value is calculated versus the oxide thickness, epi-thickness. Effects on the On resistance and the switching performances are quickly discussed.