DocumentCode :
1905484
Title :
A 5.2-GHz silicon bipolar power amplifier for IEEE 802.11a and HIPERLAN2 wireless LANs
Author :
Scuderi, Antonino ; Carrara, Francesco ; Palmisano, Giuseppe
Author_Institution :
STMicroelectronics, Catania, Italy
fYear :
2004
fDate :
21-23 Sept. 2004
Firstpage :
203
Lastpage :
206
Abstract :
A monolithic 5.2-GHz linear power amplifier for IEEE802.11a and HIPERLAN2 wireless local area networks was integrated using a low-cost 46-GHz-fT silicon bipolar process. At a 3-V supply voltage, the circuit exhibits a 25-dBm saturated output power, 26% maximum power-added efficiency, and 23.5-dBm output 1-dB compression point. The small-signal gain is 24 dB. Thanks to a linearizing bias network, the power amplifier is able to comply with the stringent error vector magnitude requirements of the standard up to a 19-dBm output power level. The device also features a power control function with a high dynamic range of 40 dB.
Keywords :
MMIC power amplifiers; bipolar analogue integrated circuits; linearisation techniques; wireless LAN; 24 dB; 26 percent; 3 V; 46 GHz; 5.2 GHz; HIPERLAN2; IEEE 802.11a; Si; bipolar power amplifier; error vector magnitude requirements; linearizing bias network; monolithic linear power amplifier; power control function; wireless LAN; Circuits; Gallium arsenide; Local area networks; Metal-insulator structures; OFDM modulation; Power amplifiers; Power generation; Silicon; Voltage; Wireless LAN;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2004. ESSCIRC 2004. Proceeding of the 30th European
Print_ISBN :
0-7803-8480-6
Type :
conf
DOI :
10.1109/ESSCIR.2004.1356653
Filename :
1356653
Link To Document :
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