Title :
A 0.11mm2 low-power A/D-converter cell for 10b 10MS/s operation
Author :
Muthers, David ; Tielert, Reinhard
Author_Institution :
Kaiserslautern Univ., Germany
Abstract :
A 10 bit 10 MS/s cyclic analog-to-digital converter has been implemented using 0.18 μm CMOS technology. The converter was optimized with respect to area and power consumption in order to allow the integration of a multichannel array within a complex logic chip. The power consumption is 9.5 mW. The area per A/D-converter cell is 0.11 mm2. The proposed cyclic converter architecture together with some implementation aspects, like working with one amplifier only and reusing the signal capacitors for the common-mode feedback helped to meet the requirements of the application.
Keywords :
CMOS integrated circuits; analogue-digital conversion; circuit feedback; differential amplifiers; low-power electronics; switched capacitor networks; 0.18 micron; 9.5 mW; CMOS; area/power consumption optimization; common-mode feedback; cyclic analog-to-digital converter; low-power A/D-converter cell; multichannel ADC array; pseudodifferential amplifier; signal capacitor reuse; switched capacitor amplifier; Capacitors; Circuits; Differential amplifiers; Energy consumption; Feedback; Preamplifiers; Rails; Sampling methods; Switches; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 2004. ESSCIRC 2004. Proceeding of the 30th European
Print_ISBN :
0-7803-8480-6
DOI :
10.1109/ESSCIR.2004.1356665
