• DocumentCode
    1905811
  • Title

    A 1.8 V, 10 Gbps fully integrated CMOS optical receiver analog front end

  • Author

    Wei-Zen Chen ; Ying-Lien Cheng

  • Author_Institution
    Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsin-Chu, Taiwan
  • fYear
    2004
  • fDate
    21-23 Sept. 2004
  • Firstpage
    263
  • Lastpage
    266
  • Abstract
    A fully integrated 10 Gbps optical receiver analog front-end (AFE), includes a trans-impedance amplifier (TIA) and a limiting amplifier (LA), is fabricated using a 0.18 μm CMOS technology. The receiver front-end provides a conversion gain up to 85 dBΩ and -3 dB bandwidth of 7.6 GHz. The sensitivity of the optical receiver is -13 dBm at a bit-error rate of 10-12 with 231-1 pseudo-random bits. 3D symmetric transformers are utilized in the AFE design for bandwidth enhancement.
  • Keywords
    CMOS analogue integrated circuits; MMIC amplifiers; error statistics; microwave limiters; optical receivers; transformers; 0.18 micron; 1.8 V; 10 Gbit/s; 3D symmetric transformers; 7.6 GHz; TIA; bandwidth enhancement; bit-error rate; conversion gain; integrated CMOS optical receiver; limiting amplifier; optical receiver analog front end; transimpedance amplifier; Bandwidth; Broadband amplifiers; CMOS technology; Detectors; Optical amplifiers; Optical noise; Optical receivers; Semiconductor optical amplifiers; Transformers; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2004. ESSCIRC 2004. Proceeding of the 30th European
  • Print_ISBN
    0-7803-8480-6
  • Type

    conf

  • DOI
    10.1109/ESSCIR.2004.1356668
  • Filename
    1356668
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1905811