DocumentCode
1905836
Title
Design of low noise CMOS OEIC for blu-ray disc optical storage systems
Author
Giardina, M. ; Stek, A. ; de Jong, G.W. ; Bergervoet, J.R.M.
Author_Institution
Philips Res., Eindhoven, Netherlands
fYear
2004
fDate
21-23 Sept. 2004
Firstpage
271
Lastpage
274
Abstract
This paper discusses the design of an optoelectronic integrated circuit (OEIC intended for optical recording systems. The electronic noise in the system is an issue for high-speed operation and dual-layer blu-ray discs. In order to get a good impression of the various noise sources in the system, a noise calculation model has been developed. The design of the photo-diode and the preamplifiers in a BiCMOS/CMOS processes is discussed. The advantage of CMOS downscaling on the speed race is reported. A novel low-noise, low-voltage and low-power CMOS topology is described. Furthermore, some preliminary results of a test OEIC in 0.18 μm CMOS are also reported. The measured input-referred current noise is 350 fAHz-12/ at 20 MHz equivalent with the shot-noise level generated by a photo current of 380 nA. The active area of the test die, excluding bonding pads, is 0.36×0.26 mm2 and the power consumption is 12.5 mW from a 1.5 V supply voltage at room temperature.
Keywords
CMOS integrated circuits; integrated circuit noise; integrated optoelectronics; low-power electronics; optical disc storage; optical receivers; photodiodes; preamplifiers; shot noise; 0.18 micron; 0.26 mm; 0.36 mm; 1.5 V; 12.5 mW; 20 MHz; 380 nA; BiCMOS; blu-ray disc optical storage systems; dual-layer blu-ray discs; input-referred current noise; low noise CMOS OEIC; low-noise topology; low-voltage topology; noise calculation model; optical recording systems; optoelectronic integrated circuit; photo current generated shot-noise; photo-diode; preamplifiers; speed race; system noise sources; High speed optical techniques; Integrated circuit noise; Optical design; Optical noise; Optical recording; Optoelectronic devices; Photonic integrated circuits; Preamplifiers; Semiconductor device modeling; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2004. ESSCIRC 2004. Proceeding of the 30th European
Print_ISBN
0-7803-8480-6
Type
conf
DOI
10.1109/ESSCIR.2004.1356670
Filename
1356670
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