Performance models for ATM applications over 45 Mb/s satellite facilities

This paper presents the results of a study aimed at quantifying the satellite facility error performance required to support known ATM applications such as circuit emulation and data services. We start with desired performance objectives at the application layer. At this point, the requirements for ATM applications are in the stage of design and discussion in various standards bodies and expert groups. Subjective and objective testing needs to be performed in a network environment for many of the applications to arrive at final performance requirements. However, in this paper, we have used the performance requirements currently available in standards documents and associated literature as a starting point for performance analysis. Therefore the results reported here should be viewed as being preliminary in nature. Next, we chart the effects of bit errors and burst errors perceived at different levels of the ATM protocol stack. Then, we develop models to relate lower layer impairments to impacts on the higher layer in the ATM protocol stack. We use these relationships to translate objectives for applications into the bit error ratio (BER) performance that will be needed from the satellite transmission facility to meet the objectives. Based on these results, we evaluate the suitability of ITU-T Rec. G.826 for ATM applications or if more stringent objectives are necessary. We plan to conduct both objective and subjective testing of different applications in a trial network environment to refine our understanding of applications requirements