DocumentCode
1906025
Title
3D Analysis of a Shallow Trench Isolated 0.25/0.25μm NMOS Transistor
Author
Sallagoity, P. ; Vincent, G. ; Poncet, A.
Author_Institution
France Telecom CNET-CNS, 28 chemin du vieux-ch?ne, B.P 98, 38243 Meylan, France
fYear
1996
fDate
9-11 Sept. 1996
Firstpage
249
Lastpage
252
Abstract
This paper presents an analysis of the small geometry 3D effects, based on experimental and simulation results of shallow trench isolated transistors. The coupling between short channel and narrow channel effects is studied as a function of bias conditions. This coupling effect reduces each 2D parasitic effect in small transistors. The threshold voltage and subthreshold current of ultra small devices have a low sensitivity to the drain and substrate bias effects, due to the combined short and narrow channel effects.
Keywords
Analytical models; CMOS technology; Geometry; Isolation technology; Low voltage; MOS devices; MOSFETs; Solid modeling; Telecommunications; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1996. ESSDERC '96. Proceedings of the 26th European
Conference_Location
Bologna, Italy
Print_ISBN
286332196X
Type
conf
Filename
5435229
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