Title :
Robust Counting Via Counter Braids: An Error-Resilient Network Measurement Architecture
Author :
Lu, Yi ; Prabhakar, Balaji
Author_Institution :
Dept. of EE, Stanford Univ., Stanford, CA
Abstract :
A novel counter architecture, called counter braids, has recently been proposed for accurate per-flow measurement on high-speed links. Inspired by sparse random graph codes, counter braids solves two central problems of per-flow measurement: one-to-one flow-to-counter association and large amount of unused counter space. It eliminates the one-to-one association by randomly hashing a flow label to multiple counters and minimizes counter space by incrementally compressing counts as they accumulate. The random hash values are reproduced offline from a list of flow labels, with which flow sizes are decoded using a fast message passing algorithm. The decoding of counter braids introduces the problem of collecting flow labels active in a measurement epoch. An exact solution to this problem is expensive. This paper complements the previous proposal with an approximate flow label collection scheme and a novel error-resilient decoder that decodes despite missing flow labels. The approximate flow label collection detects new flows with variable-length signature counting Bloom filters in SRAM, and stores flow labels in high-density DRAM. It provides a good trade-off between space and accuracy: more than 99 percent of the flows are captured with very little SRAM space. The decoding challenge posed by missing flow labels calls for a new algorithm as the original message passing decoder becomes error-prone. In terms of sparse random graph codes, the problem is equivalent to decoding with graph deficiency, a scenario beyond coding theory. The error-resilient decoder employs a new message passing algorithm that recovers most flow sizes exactly despite graph deficiency. Together, our solution achieves a 10-fold reduction in SRAM space compared to hash-table based implementations, as demonstrated with Internet trace evaluations.
Keywords :
DRAM chips; SRAM chips; decoding; filters; graph theory; message passing; variable length codes; Bloom filters; DRAM; Internet trace evaluations; SRAM; counter braids; error-resilient decoder; error-resilient network measurement; flow label collection scheme; graph deficiency; high-speed links; message passing algorithm; one-to-one flow-to-counter association; per-flow measurement; randomly hashing; robust counting; scenario beyond coding theory; sparse random graph codes; variable-length signature; Codes; Counting circuits; Decoding; Extraterrestrial measurements; Filters; Fluid flow measurement; Message passing; Proposals; Random access memory; Robustness;
Conference_Titel :
INFOCOM 2009, IEEE
Conference_Location :
Rio de Janeiro
Print_ISBN :
978-1-4244-3512-8
Electronic_ISBN :
0743-166X
DOI :
10.1109/INFCOM.2009.5061958