• DocumentCode
    190617
  • Title

    A reduced latency list decoding algorithm for polar codes

  • Author

    Jun Lin ; Chenrong Xiong ; Zhiyuan Yan

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Lehigh Univ., Bethlehem, PA, USA
  • fYear
    2014
  • fDate
    20-22 Oct. 2014
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    The cyclic redundancy check (CRC) aided successive cancelation list (SCL) decoding algorithm has better error performance than the successive cancelation (SC) decoding algorithm for short or moderate polar codes. However, the CRC aided SCL (CA-SCL) decoding algorithm still suffer from long decoding latency. In this paper, a reduced latency list decoding (RLLD) algorithm for polar codes is proposed. For the proposed RLLD algorithm, all rate-0 nodes and part of rate-1 nodes are decoded instantly without traversing the corresponding subtree. A list maximum-likelihood decoding (LMLD) algorithm is proposed to decode the maximum likelihood (ML) nodes and the remaining rate-1 nodes. Moreover, a simplified LMLD (SLMLD) algorithm is also proposed to reduce the computational complexity of the LMLD algorithm. Suppose a partial parallel list decoder architecture with list size L = 4 is used, for an (8192, 4096) polar code, the proposed RLLD algorithm can reduce the number of decoding clock cycles and decoding latency by 6.97 and 6.77 times, respectively.
  • Keywords
    cyclic codes; cyclic redundancy check codes; decoding; error correction codes; CRC; LMLD algorithm; RLLD algorithm; SCL decoding algorithm; computational complexity; cyclic redundancy check; decoding clock cycles; decoding latency; list maximum-likelihood decoding; polar codes; reduced latency list decoding algorithm; successive cancellation list; Government;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Systems (SiPS), 2014 IEEE Workshop on
  • Conference_Location
    Belfast
  • Type

    conf

  • DOI
    10.1109/SiPS.2014.6986062
  • Filename
    6986062