Packet arrival time in 1588 for 40GE/100GE

Author

Mendel, David ; Schmit, Herman ; Vijayaraghavan, Divya

Author_Institution

Altera Corp., San Jose, CA, USA

fYear

2012

fDate

24-28 Sept. 2012

Firstpage

1

Lastpage

6

Abstract

1588 timestamping assumes a well-defined instant at which the beginning of a packet crosses the reference plane between the precision time protocol (PTP) node and the network. However, this definition is not clear in the case of a multi-lane serial bus such as 40GE/100GE. Furthermore, there is an implied time-ordering between the lanes of a serial bus that is not captured in the existing definition. This paper explores issues with multi-lane serial buses as it relates to time-stamping and proposes revised definitions for packet arrival time in the case of a serial bus.

Keywords

peripheral interfaces; protocols; telecommunication standards; time-of-arrival estimation; 100GE; 1588 time-stamping; 40GE; PTP node; bit rate 100 Gbit/s; bit rate 40 Gbit/s; multilane serial bus; packet arrival time; precision time protocol; telecommunication standard; time of arrival estimation; time-ordering; Clocks; Delay; EPON; Field programmable gate arrays; IEEE 802.3 Standards; Media; Optics; 100GE; 1588; 40GE; Communication standards; Lane deskew; Measurement standard; Telecommunication standard; Time dissemination; Time measurement; Time of arrival estimation;

fLanguage

English

Publisher

ieee

Conference_Titel

Precision Clock Synchronization for Measurement Control and Communication (ISPCS), 2012 International IEEE Symposium on

Conference_Location

San Francisco, CA

ISSN

1949-0305

Print_ISBN

978-1-4577-1714-7

Type

conf

DOI

10.1109/ISPCS.2012.6336614

Filename

6336614