Title :
1-58 Gb/s PRBS generator with <1.1 ps RMS jitter in InP technology
Author_Institution :
Philips Res., Eindhoven, Netherlands
Abstract :
Pseudo-random binary sequence (PRBS) generators are widely used for testing communication systems. This paper describes a fully integrated PRBS generator, supporting output data rates between 1-58 Gb/s, with output jitter below 1.1 ps RMS, requiring only a single reference clock input. This has been achieved, based on impedance-matched clock signal distribution and transmission line modelling. Two half-rate outputs from the PRBS generator core are multiplexed to form the high-speed data output. The IC provides a trigger signal output plus all-zero detection and correction functionality.
Keywords :
binary sequences; bipolar logic circuits; coplanar transmission lines; current-mode logic; flip-flops; frequency dividers; impedance matching; multiplexing; random sequences; signal generators; timing jitter; trigger circuits; 1 to 58 Gbit/s; HBT process; InP; all-zero correction; all-zero detection; current-mode logic; generator output data rate; half-rate output multiplexing; impedance-matched clock signal distribution; integrated PRBS generator; latch circuit; output jitter; pseudo-random binary sequence generators; ripple divider; single reference clock input; transmission line modelling; trigger signal output; Clocks; Coplanar transmission lines; Delay; Digital circuits; Impedance; Indium phosphide; Jitter; Latches; Multiplexing; Power transmission lines;
Conference_Titel :
Solid-State Circuits Conference, 2004. ESSCIRC 2004. Proceeding of the 30th European
Print_ISBN :
0-7803-8480-6
DOI :
10.1109/ESSCIR.2004.1356692
