Title :
Compact Spice Model of EEprom Memory Cell For Writing/Erasing/Read Operation
Author_Institution :
SGS-THOMSON Microelectronics / Central R&D, Avenue des Martyrs - F - 38019 Grenoble
Abstract :
A compact SPICE model to simulate the transient operation of an EEprom cell is presented. Fowler-Nordheim tunneling describes the gate current. Floating gate potential is induced by the external biases and the charge injected. The main application is the simulation of memory circuitry including EEprom cell, taking into account electrical and reliability constraints.
Keywords :
Capacitance; Circuit simulation; EPROM; MOSFETs; Microelectronics; Nonvolatile memory; Read-write memory; SPICE; Tunneling; Writing;
Conference_Titel :
Solid State Device Research Conference, 1991. ESSDERC '91. 21st European
Conference_Location :
Montreux, Switzerland
