DocumentCode :
190683
Title :
Coarse-grained reconfigurable stream processor for distributed smart cameras
Author :
Wei-Kai Chan ; Yu-Hsiang Tseng ; Yu-Sheng Lin ; Shao-Yi Chien
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2014
fDate :
20-22 Oct. 2014
Firstpage :
1
Lastpage :
6
Abstract :
To support distributed video content analysis for video sensors in machine-to-machine networks, a reconfigurable stream processor for distributed smart cameras is proposed in this paper. A coarse-grained reconfigurable image stream processing architecture (CRISPA) with heterogeneous stream processing (HSP) and subword-level parallelism (SLP) is proposed to accelerate various algorithms for computer vision applications of smart-cameras. Implementation results show that the proposed design outperforms existing vision processors in many aspects: the on-chip memory size, power efficiency and area efficiency are 18.2 to 87.4 times, 4.5 to 12.5 times, and 3.8 to 25.5 times better than the state-of-the-art chips. Moreover, the programmability of the proposed design makes it capable of supporting many high-level computer vision algorithms in high specification.
Keywords :
computer networks; computer vision; video cameras; CRISPA; coarse-grained reconfigurable image stream processing architecture; coarse-grained reconfigurable stream processor; computer vision applications; distributed smart cameras; distributed video content analysis; heterogeneous stream processing; high-level computer vision algorithms; machine-to-machine networks; on-chip memory size; smart-cameras; subword-level parallelism; video sensors; Bandwidth; Hardware; Memory management; Smart cameras; Streaming media; System-on-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Systems (SiPS), 2014 IEEE Workshop on
Conference_Location :
Belfast
Type :
conf
DOI :
10.1109/SiPS.2014.6986097
Filename :
6986097
Link To Document :
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