Title :
A new type of inverter with Juctionless (J-Less) transistors
Author :
Hsieh, E.R. ; Chung, Steve S.
Author_Institution :
Dept. of Electron. Eng. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
A new type of inverter built on a specific channel without source/drain junction is proposed. This inverter can be formed by a connected n- and p-doped channel as the substrate and with complementary p- and n-doped gates respectively. The transistor operation is in accumulation mode, different from the conventional CMOS devices with inversion mode of operation. Extensive simulations have been made to demonstrate this transistor with high current density and good short channel control on 10nm technology and beyond. Good inverter characteristics are also shown. This new inverter device will be ready for the 20nm node and beyond.
Keywords :
CMOS logic circuits; current density; invertors; transistors; CMOS device; J-less transistor; current density; inverter; junctionless transistor; n-doped channel; p-doped channel; CMOS integrated circuits; Capacitance; Electrodes; Inverters; Logic gates; Transient analysis; Transistors;
Conference_Titel :
Silicon Nanoelectronics Workshop (SNW), 2010
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-7727-2
Electronic_ISBN :
978-1-4244-7726-5
DOI :
10.1109/SNW.2010.5562541
