Title :
Thermal placement for high-performance multichip modules
Author :
Chao, Kai-Yuan ; Wong, D.F.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Abstract :
A placement scheme that considers both electrical performance requirements and thermal behavior for the high-performance multichip modules is described in this paper. Practical thermal models are used for placement of high-speed chips in multichip module packages under two different cooling environments: conduction cooling and convection cooling. Placement methods are modified to optimize conventional electrical performance and chip junction temperatures
Keywords :
circuit analysis computing; convection; cooling; multichip modules; chip junction temperatures; conduction cooling; convection cooling; cooling environments; electrical performance requirements; high-performance multichip modules; high-speed chips; multichip module packages; thermal behavior; thermal models; thermal placement; Circuit testing; Electronic packaging thermal management; Electronics cooling; Heat sinks; Integrated circuit interconnections; Multichip modules; Routing; Thermal conductivity; Thermal management; Thermal resistance;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1995. ICCD '95. Proceedings., 1995 IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
0-8186-7165-3
DOI :
10.1109/ICCD.1995.528813
