Title :
A 1.2V 80MS/S sample and hold for ADC applications
Author :
Reddy, Y. Sunil Gavaskar ; Liter, Siek
Author_Institution :
Dept. of Electron. & Commun. Eng., Anurag Eng. Coll., Kodad, India
Abstract :
This Paper presents the design of low voltage sample and hold amplifier for analog to digital converter applications. The proposed design uses double sampling technique to increase the sampling rate, reliable bootstrap switch to reduce switch on resistance and to extend linear range of switch. A rail-to-rail ICMR op-amp, is used to extend the input operating range. The designed sample and hold operates at 80MS/s from 1.2V supply. The circuits are designed using CSM 0.18um technology in cadence environment and power consumption estimated was 4.15mW.
Keywords :
analogue-digital conversion; bootstrap circuits; integrated circuit design; low-power electronics; operational amplifiers; sample and hold circuits; ADC application; CSM technology; analog to digital converter application; bootstrap switch; cadence environment; circuit design; double sampling technique; low voltage sample and hold amplifier; power consumption; rail-to-rail ICMR op-amp; sampling rate; size 0.18 mum; switch linear range; voltage 1.2 V; MOS devices; Switches;
Conference_Titel :
Devices, Circuits and Systems (ICDCS), 2012 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4577-1545-7
DOI :
10.1109/ICDCSyst.2012.6188668
