DocumentCode :
1908162
Title :
Extending a Prolog architecture for high performance numeric computations
Author :
Yung, Robert ; Despain, Alvin M. ; Patt, Yale N.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Volume :
1
fYear :
1989
fDate :
3-6 Jan 1989
Firstpage :
393
Abstract :
The Aquarius numeric processor (ANP) is an extended numeric instruction set architecture that is based on the Berkeley programmed logic machine (PLM) and supports integrated symbolic and numeric calculations. This extension expands the existing numeric data type to include 32- and 64-bit integers and single- and double-precision floating-point numbers conforming to the IEEE Standard P754. A class of data structure called numeric arrays has been added to represent matrices and arrays found in most scientific programming languages. Powerful numeric instructions are included to manipulate these novel data types. The authors describe the programming model and the architecture of the ANP. An experimental ANP is currently under construction using TTL (transistor-transistor logic) and ECL (emitter-coupled logic) parts. Simulated performance results indicate that the system will achieve about 10 MFLOPs (millions of floating-point operations) on the Prolog version of some Whetstone and Linpack benchmarks and close to 20 MFLOPS on some matrix operations (all in double precision)
Keywords :
data structures; instruction sets; parallel architectures; 10 MFLOPS; 20 MFLOPS; 32-bit integers; 64-bit integers; ANP; Aquarius numeric processor; Berkeley programmed logic machine; ECL; IEEE Standard P754; Linpack benchmarks; PLM; Prolog architecture; TTL; Whetstone benchmarks; data structure; double-precision floating-point numbers; emitter-coupled logic; extended numeric instruction set architecture; integrated numeric calculations; integrated symbolic calculations; matrices; numeric arrays; numeric computations; numeric data type; numeric instructions; programming model; scientific programming languages; single-precision floating-point numbers; transistor-transistor logic; Application software; Computer architecture; Computer science; Data structures; Design automation; High performance computing; Linear algebra; Logic programming; Programmable logic arrays; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System Sciences, 1989. Vol.I: Architecture Track, Proceedings of the Twenty-Second Annual Hawaii International Conference on
Conference_Location :
Kailua-Kona, HI
Print_ISBN :
0-8186-1911-2
Type :
conf
DOI :
10.1109/HICSS.1989.47181
Filename :
47181
Link To Document :
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