A harmonic analysis algorithm based on synchronous sampling

The harmonic pollution has become a more and more serious problem because of the large-scale application of nonlinear electrical loads in power systems. It is known to all that fast Fourier transformation (FFT) is an effective method for power signal harmonic analysis, but aliasing effect, picket fence effect, spectrum leakage and spectrum disturbance make it suffer from inevitable limitation. In this paper, to solve the above problems of FFT, an all-digital synchronous sampling algorithm for high-precision harmonic analysis is proposed, which is suitable for the implementation of very large scale integration (VLSI). The main idea of this algorithm is to make the decimation ratio of the decimation filter of a oversampling analog-to-digital converter(OSADC) dynamically associate with the fundamental frequency of the power signals, which is irregularly fluctuant but can be real-time tracked by the frequency estimation algorithm, designed in this paper. As a result, the average sampling frequency of the decimation filter output can change with the input signal frequency. Compared with the software synchronous sampling and asynchronous sampling methods, the proposed algorithm can be implemented more easily and needs much less hardware costs.