Title :
Soft error rate scaling for emerging SOI technology options
Author :
Oldiges, P. ; Bernstein, K. ; Heidel, D. ; Klaasen, B. ; Cannon, E. ; Dennard, R. ; Tang, H. ; Ieong, M. ; Wong, H.-S.P.
Author_Institution :
IBM Corp., Hopewell Junction, NY, USA
Abstract :
The soft error rate in SOI devices is explored. Conventional SOI device soft error rate is compared to high mobility SOI and double gate SOI designs. We develop a theoretical understanding of the susceptibility of SOI devices to /spl alpha/-particle induced soft errors by means of simulations and measurements. Although high mobility devices will decrease soft error rate susceptibility, silicon thinning is shown to have a much larger impact. Double gate devices are shown to improve the soft error rate even further.
Keywords :
SRAM chips; alpha-particle effects; carrier mobility; circuit simulation; error analysis; integrated circuit measurement; integrated circuit modelling; integrated circuit reliability; silicon-on-insulator; /spl alpha/-particle induced soft error susceptibility; SOI device measurements; SOI devices; SOI technology; SRAM cell; Si-SiO/sub 2/; double gate SOI; high mobility SOI; silicon thinning; simulations; soft error rate scaling; Capacitance; Circuit optimization; Error analysis; Insulation life; Microelectronics; Moore´s Law; Random access memory; Silicon on insulator technology; Switches; Voltage;
Conference_Titel :
VLSI Technology, 2002. Digest of Technical Papers. 2002 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-7312-X
DOI :
10.1109/VLSIT.2002.1015382
