Strong correlation between dielectric reliability and charge trapping in SiO/sub 2//Al/sub 2/O/sub 3/ gate stacks with TiN electrodes

Author

Kerber, A. ; Cartier, E. ; Degraeve, R. ; Pantisano, L. ; Roussel, P. ; Groeseneken, G.

fYear

2002

fDate

11-13 June 2002

Firstpage

76

Lastpage

77

Abstract

Polarity-dependent charge trapping and defect generation have been observed in SiO/sub 2//Al/sub 2/O/sub 3/ gate stacks with TiN electrodes. For the substrate injection case, electron trapping in the bulk of the Al/sub 2/O/sub 3/ films dominates, whereas hole trap near the Si substrate is observed for gate injection. This asymmetry in defect creation causes an asymmetry in oxide reliability. For gate injection, reliability is limited by the thin SiO/sub 2/ interfacial layer, yielding low beta values, independent of the Al/sub 2/O/sub 3/ thickness. For substrate injection, reliability is limited by electron trap generation in the bulk of the Al/sub 2/O/sub 3/ film, yielding a strong thickness dependence of the beta values, as expected from the percolation model and as observed in SiO/sub 2/ layers of similar thickness.

Keywords

MOS capacitors; alumina; charge injection; dielectric thin films; electric breakdown; electron traps; hole traps; interface states; semiconductor device reliability; silicon compounds; CMOS process; MOS capacitors; Si; Si [100] wafers; Si substrate; SiO/sub 2/-Al/sub 2/O/sub 3/; SiO/sub 2//Al/sub 2/O/sub 3/ gate stacks; TiN; TiN electrodes; charge trapping; defect creation asymmetry; defect generation; dielectric breakdown; dielectric reliability; electron trapping; fully depleted SOI technology; gate injection; hole trapping; low beta values; oxide reliability asymmetry; percolation model; polarity-dependent charge trapping; substrate injection; substrate injection case; thickness dependence; thin SiO/sub 2/ interfacial layer; Charge carrier processes; Chemical vapor deposition; Degradation; Dielectric breakdown; Electrodes; Electron traps; MOS capacitors; Substrates; Tin; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2002. Digest of Technical Papers. 2002 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-7312-X

Type

conf

DOI

10.1109/VLSIT.2002.1015396

Filename

1015396