Improved performance of ultra-thin HfO/sub 2/ CMOSFETs using poly-SiGe gate

Author

Qiang Lu ; Takeuchi, H. ; Xiaofan Meng ; King, T.-J. ; Chenming Hu ; Onishi, K. ; Hag-ju Cho ; Lee, J.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

fYear

2002

fDate

11-13 June 2002

Firstpage

86

Lastpage

87

Abstract

Poly-SiGe is investigated as the gate material for CMOS transistors with ultra-thin HfO/sub 2/ gate dielectric. Compared with poly-Si, poly-SiGe reduces the gate depletion effect, and also results in thinner EOT of the gate dielectric after 1000/spl deg/C annealing, with low gate leakage maintained. The Si interface quality is also better than that achieved with surface nitridation, which has been used to reduce EOT. Therefore, the use of poly-SiGe as the gate material is effective for improving the performance of ultra-thin HfO/sub 2/ CMOS transistors.

Keywords

CMOS integrated circuits; Ge-Si alloys; MOSFET; annealing; dielectric thin films; hafnium compounds; interface states; leakage currents; 1000 degC; HfO/sub 2/; Si interface quality; SiGe; annealing; gate depletion effect; gate dielectric EOT; low gate leakage; poly-SiGe gate; ultra-thin HfO/sub 2/ CMOSFETs; ultra-thin HfO/sub 2/ gate dielectric; Boron; CMOS process; CMOSFETs; Dielectric materials; Gate leakage; Hafnium oxide; High K dielectric materials; Rapid thermal annealing; Temperature; Tin;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2002. Digest of Technical Papers. 2002 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-7312-X

Type

conf

DOI

10.1109/VLSIT.2002.1015400

Filename

1015400