DocumentCode
1909416
Title
Extending equivalence class computation to large FSMs
Author
Cabodi, Gianpiero ; Quer, Stefano ; Camurati, Paolo
Author_Institution
Dipartimento di Autom. e Inf., Politecnico di Torino, Italy
fYear
1995
fDate
2-4 Oct 1995
Firstpage
258
Lastpage
263
Abstract
Computing equivalence classes for finite state machines (FSMs) has several applications to synthesis and verification problems, like state minimization, automata reduction, and logic optimization with don´t cares. Symbolic traversal techniques are applicable to medium-small circuits. This paper extends their use to large FSMs by means of cofactor-based enhancements to the state-of-the-art approaches and of underestimations of equivalence classes. The key to success is pruning the search space by constraining it. Experimental results on some of the larger ISCAS´89 and MCNC circuits show its applicability
Keywords
equivalence classes; finite state machines; logic design; minimisation of switching nets; ISCAS´89; MCNC circuits; automata reduction; cofactor-based enhancements; equivalence class computation; finite state machines; logic optimization; search space; state minimization; symbolic traversal techniques; verification problems; Automata; Automatic logic units; Boolean functions; Circuit synthesis; Data structures; Formal verification; Graph theory; Latches; Minimization; State-space methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1995. ICCD '95. Proceedings., 1995 IEEE International Conference on
Conference_Location
Austin, TX
ISSN
1063-6404
Print_ISBN
0-8186-7165-3
Type
conf
DOI
10.1109/ICCD.1995.528819
Filename
528819
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