Title :
A cellular automata based high speed test hardware for word-organized memories
Author :
Saha, Mousumi ; Sikdar, Biplab K.
Author_Institution :
Dept. of Comput. Applic., Nat. Inst. of Technol., Durgapur, India
Abstract :
Memories are the most defect sensitive parts in a machine computer. Conventionally, variations of March test are extensively used for functional test of SRAMs and DRAMs. In this work, we propose a CA (Cellular Automata) based scheme for efficient implementation of March test with the target to realize fault detection in high speed memories. The special class of CA referred to as the SACA is used for the purpose. The regular structure of CA enables low cost implementation of test logic for the memory chip that is inherently regular in structure. Utilization of the existing memory cells, while designing the CA based test logic, ensures drastic reduction in the test overhead.
Keywords :
DRAM chips; SRAM chips; cellular automata; fault diagnosis; high-speed integrated circuits; integrated circuit testing; CA based test logic; DRAM; March test variations; SACA; SRAM; cellular automata scheme; fault detection; functional test; high speed memory; high speed test hardware; machine computer; memory chip; word-organized memory; March tests; Memory tests; SACA; cellular automata (CA); fault detection;
Conference_Titel :
Devices, Circuits and Systems (ICDCS), 2012 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4577-1545-7
DOI :
10.1109/ICDCSyst.2012.6188734
