Title :
Nano-scale Recessed Asymmetric Schottky Contacted CMOS
Author :
Zhang, Yaohui ; Li, Ruigang ; Hong, Sung-Kwon ; Wang, Kang L. ; Nguyen, Bich-yen ; Joardar, Kuntal ; Pham, Daniel ; Yao, Wei
Author_Institution :
Electr. Eng. Dept., Califomia Univ., Los Angeles, CA, USA
Abstract :
A new CMOS device architecture named as Recessed Asymmetric Schottky Contacted CMOS ( RASC-CMOS) has been proposed and simulated by using commercial version device simulator DESSIS 6.1. RASC-CMOS can eliminate the two critical drawbacks of conventional Schottky contacted CMOS (SC-CMOS): 1) unacceptable off-state current (>10 nA/μm), 2) strong short-channel effects when the feature size of SC-CMOS scaled down to 10 nm. In the meantime, RASC-CM0S has kept the advantage of with extremely simplified fabrication process of SC-CMOS
Keywords :
CMOS integrated circuits; Schottky barriers; integrated circuit technology; nanotechnology; 10 nm; DESSIS 6.1 simulation; RASC-CMOS architecture; fabrication process; nano-scale Recessed Asymmetric Schottky Contacted CMOS; off-state current; short-channel effect; Carrier confinement; Contacts; Doping; Fabrication; Fluctuations; MOSFET circuits; P-n junctions; Schottky barriers; Silicides; Silicon;
Conference_Titel :
Nanotechnology, 2001. IEEE-NANO 2001. Proceedings of the 2001 1st IEEE Conference on
Conference_Location :
Maui, HI
Print_ISBN :
0-7803-7215-8
DOI :
10.1109/NANO.2001.966418
