Title :
Using PLAs to design universal logic modules in FPGAs
Author :
Lee, K.K. ; Wong, D.F.
Author_Institution :
Dept. of Comput. Sci., Texas Univ., Austin, TX, USA
fDate :
31 May-3 Jun 1998
Abstract :
We consider implementing Universal Logic Modules (ULMs) in Field Programmable Gate Arrays (FPGAs) with Programmable Logic Arrays (PLAs) using a reduced number of programmable switches. These have the advantages of a regular structure and are very easy to program. By suitably reducing the number of switches in a PLA, the total number of switches is reduced tremendously, while the PLA still remains functionally complete. Since switch features take up more space than other logic elements, the savings can translate to a reduction in area. The reduction in programmable switches implies that a smaller number of programming bits is required for each ULM. We obtained 3-input and 4-input ULMs using 5 and 13 programmable switches respectively, matching previous results obtained by Zilic et al. (1996) but in a smaller area. Technology mapping is also very simple. We also obtain approximate ULMs with very high coverage. We obtained an approximate ULM using 11 programming switches which covers 99% of all 4-input functions, using a much smaller area than Thakur et al. (1995)
Keywords :
circuit layout CAD; field programmable gate arrays; integrated circuit layout; logic CAD; programmable logic arrays; FPGA; PLAs; field programmable gate arrays; programmable logic arrays; programmable switches reduction; technology mapping; universal logic module design; Data structures; Field programmable gate arrays; Functional programming; Logic circuits; Logic design; Logic programming; Programmable logic arrays; Routing; Switches; Table lookup;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.705301