Water marks induced polysilicon thinning in DRAM fabrication

In this study, we report an extraordinary case of water marks induced polysilicon thinning in the conventional poly Si/WSix gate process. These water marks were initially not seen by KLA after the polycide gate etching but appeared at the capacitor area of the peripheral circuit after the mask oxidation process. The polysilicon thinning is found to be the result of local depletion of Si due to overdiffusion from the poly Si layer near the water mark border during mask oxidation. The suppression of water marks formation was carried out successfully by modifying the doped poly Si deposition with a thin undoped capped poly Si layer. The poly Si film roughness associated with this modification was effectively avoided by reducing the cycle purge temperature during poly Si film deposition