Polysilicon Thin Film Transistor : a Study of some Techniques of Realisation of the Channel Region and of the Gate

Author

Scheid, E. ; Campo, E. ; Pedroviejo, J.J. ; Naimi, S. ; Sarrabayrouse, G. ; Bielle-Daspet, D.

Author_Institution

LAAS, Touluose, France

fYear

1993

fDate

13-16 Sept. 1993

Firstpage

57

Lastpage

60

Abstract

In this work, we show how some combinations of original processes for TFTs elaboration can result in interesting electrical characteristics. The temperature dependence of the field effect mobility shows that both oxidation and Rapid Thermal Annealing (at 750°C) may have detrimental and favourable effects on μη, and that the combination with Low Temperature Annealing (at 600°C) leads to the best values of both the mobility and the threshold voltage.

Keywords

oxidation; rapid thermal annealing; thin film transistors; TFT elaboration; channel region; electrical characteristics; field effect mobility; low-temperature annealing; oxidation; polysilicon thin film transistor; rapid thermal annealing; temperature 600 degC; temperature 750 degC; temperature dependence; threshold voltage; Amorphous materials; Crystallization; Electron mobility; Insulation; Oxidation; Rapid thermal annealing; Semiconductor films; Silicon; Temperature; Thin film transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Device Research Conference, 1993. ESSDERC '93. 23rd European

Conference_Location

Grenoble

Print_ISBN

2863321358

Type

conf

Filename

5435462