DocumentCode
1912041
Title
Study of process-induced mechanical stresses in multi-chip modules packaged with a chip-on-board technology
Author
Guérin, L. ; Weber, A. ; Sarbach, P. ; Dutoit, M. ; Clot, P.
Author_Institution
Swiss Fed. Inst. of Technol., Lausanne, Switzerland
fYear
1993
fDate
13-16 Sept. 1993
Firstpage
89
Lastpage
92
Abstract
The chip-on-board (COB) technology offers a compact, low-cost solution to multi-chip packaging. Process-induced thermal and mechanical stresses in COB modules can affect the quality and reliability of the final product. In this paper we present an experimental and numerical study of these stresses.
Keywords
chip-on-board packaging; circuit reliability; multichip modules; thermal stresses; COB technology; chip-on-board technology; experimental study; final product quality; final product reliability; multichip modules; multichip packaging; numerical study; process-induced mechanical stress; process-induced thermal stress; Bonding; Curing; Epoxy resins; Integrated circuit packaging; Integrated circuit technology; Polymers; Stress measurement; Temperature; Thermal stresses; Thermomechanical processes;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1993. ESSDERC '93. 23rd European
Conference_Location
Grenoble
Print_ISBN
2863321358
Type
conf
Filename
5435468
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