DPDAT: data path direct access testing

Author

Sup Kim, Kee ; Jayabharath, Rathish ; Carstens, Craig ; Vishakantaiah, Praveen ; Feltham, Derek ; Carbine, Adrian

Author_Institution

Test Technol., Intel Corp., Folsom, CA, USA

fYear

2001

fDate

2001

Firstpage

188

Lastpage

195

Abstract

Data Path Direct Access Test, DPDAT, supports efficient structural test of targeted datapath blocks using existing non-datapath DFT features in conjunction with architectural transparency already present in surrounding datapath blocks. This new DFT technique allows ATPG patterns generated at logic block levels to be applied at the full chip without expensive DFT overhead. The results of investigating feasibility on Intel(R) Pentium(R) 4 show existence of these natural transparent paths, low area overhead and high fault coverage using sequential ATPG techniques under DPDAT

Keywords

automatic test pattern generation; computer architecture; design for testability; integrated circuit testing; logic CAD; logic testing; microprocessor chips; sequential circuits; ATPG patterns; DPDAT; area overhead; data path direct access test; fault coverage; feasibility; nondatapath DFT; sequential ATPG; structural test; targeted datapath blocks; Added delay; Automatic test pattern generation; Cities and towns; Costs; Design for testability; Logic arrays; Logic design; Logic testing; Microprocessors; Sequential analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2001. Proceedings. International

Conference_Location

Baltimore, MD

ISSN

1089-3539

Print_ISBN

0-7803-7169-0

Type

conf

DOI

10.1109/TEST.2001.966633

Filename

966633