Title :
Optimised Drain/Source Engineering for 0.35 μm NMOS Transistors
Author :
Ogier, J.-L. ; Haond, M.
Author_Institution :
CNET/CNS, France Telecom, Meylan, France
Abstract :
We have compared in terms of drivability and reliability different LDD structures for 0.35 μm NMOS transistor. The sensitivities of device performance and hot carrier degradation to the LDD implant tilt angle and dose were measured and evaluated. The results indicate that LArge-Tilt-angle Implanted Drain (LATID) with high dose provides a well-optimised device.
Keywords :
MOSFET; hot carriers; semiconductor device reliability; semiconductor doping; LATID; LDD implant tilt angle; LDD structure; NMOS transistor drivability; NMOS transistor reliability; device performance; hot carrier degradation; large-tilt-angle implanted drain; optimised drain-source engineering; size 0.35 mum; well optimised device; CMOS technology; Current measurement; Degradation; Doping profiles; Electrical resistance measurement; Hot carriers; Implants; MOS devices; MOSFETs; Voltage;
Conference_Titel :
Solid State Device Research Conference, 1993. ESSDERC '93. 23rd European
Conference_Location :
Grenoble
