DocumentCode :
1913174
Title :
Architecture and design of a 40 gigabit per second ATM switch
Author :
Butner, steven E. ; Skirmont, David A.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
fYear :
1995
fDate :
2-4 Oct 1995
Firstpage :
352
Lastpage :
357
Abstract :
This paper presents the architecture of a very high performance 4-input, 4-output asynchronous transfer mode (ATM) switch that has been designed as part of the ARPA-sponsored “Thunder and Lightning” project at the University of California, Santa Barbara. This research project is focused on the design and prototype demonstration of ATM links and switches operating at or above 40 gigabits per second per TDM link, with potential scalability to 100 Gbps. Such aggressive link rates place severe requirements on switch architecture, particularly the buffering scheme. In this paper we present the ATM switch structure and justify the main design choices
Keywords :
asynchronous transfer mode; multiprocessor interconnection networks; optical communication; optical interconnections; 40 Gbit/s; ATM links; ATM switch; buffering scheme; switch architecture; Asynchronous transfer mode; Bandwidth; Clocks; Communication switching; Computer architecture; Optical buffering; Optical interconnections; Optical modulation; Optical packet switching; Optical switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1995. ICCD '95. Proceedings., 1995 IEEE International Conference on
Conference_Location :
Austin, TX
ISSN :
1063-6404
Print_ISBN :
0-8186-7165-3
Type :
conf
DOI :
10.1109/ICCD.1995.528833
Filename :
528833
Link To Document :
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