DocumentCode :
1913185
Title :
GRAAL: a tool for highly dependable SRAMs generation
Author :
Chiusano, Silvia ; Di Natale, Giorgio ; Prinetto, P. ; Bigongiar, Franco
Author_Institution :
Dipt. di Autom. e Inf., Politecnico di Torino, Italy
fYear :
2001
fDate :
2001
Firstpage :
250
Lastpage :
257
Abstract :
Presents a tool to achieve proper reliability levels in systems based on memories, allowing the automatic insertion of BIST architectures for both OFF-line and ON-line memory testing. While OFF-line memory testing was partially targeted by the available commercial tools, ON-line memory testing has so far not been covered. The set of algorithms and architectures supported by the tool is not limited, and it can be easily extended to include innovative architectures and achieve the reliability requirements in any application. Using the tool, the designer can generate dependable memories, trading-off in the design process dependability properties and costs
Keywords :
SRAM chips; built-in self test; hardware description languages; integrated circuit economics; integrated circuit reliability; integrated circuit testing; memory architecture; BIST architectures; GRAAL; OFF-line memory testing; ON-line memory testing; SRAMs; automatic insertion; costs; dependability properties; dependable memories; reliability levels; Automatic testing; Built-in self-test; Costs; Fault detection; Logic testing; Memory architecture; Process design; Random access memory; Space technology; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2001. Proceedings. International
Conference_Location :
Baltimore, MD
ISSN :
1089-3539
Print_ISBN :
0-7803-7169-0
Type :
conf
DOI :
10.1109/TEST.2001.966640
Filename :
966640
Link To Document :
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