Analog parameters of MuGFET devices with different source/drain engineering

Author

Galeti, M. ; Rodrigues, M. ; Martino, J.A. ; Collaert, N. ; Simoen, E. ; Aoulaiche, M. ; Claeys, C.

Author_Institution

LSI/PSI, Univ. of Sao Paulo, Sao Paulo, Brazil

fYear

2012

fDate

14-17 March 2012

Firstpage

1

Lastpage

4

Abstract

This work characterizes the analog performance of SOI n-MuGFETs with different source/drain configurations. Devices without source/drain extension lead to a larger intrinsic voltage gain, even with the reduced transconductance, due to the increased Early voltage. At the same time, they showed a degradation of the interface quality with a larger low-frequency noise and reduced linearity. On the other hand, they can achieve reduced GIDL current due to the suppressed vertical electric field.

Keywords

field effect transistors; silicon-on-insulator; MuGFET device; SOI n-MuGFET; analog parameters; ertical electric field; interface quality; intrinsic voltage gain; low-frequency noise; source/drain configuration; source/drain engineering; source/drain extension; transconductance; Electric fields; FinFETs; Logic gates; Noise; Silicon; Transconductance; Multiple-gate devices; analog parameters; source and drain extensions;

fLanguage

English

Publisher

ieee

Conference_Titel

Devices, Circuits and Systems (ICCDCS), 2012 8th International Caribbean Conference on

Conference_Location

Playa del Carmen

Print_ISBN

978-1-4577-1116-9

Electronic_ISBN

978-1-4577-1115-2

Type

conf

DOI

10.1109/ICCDCS.2012.6188896

Filename

6188896