Title :
Multiple-output propagation transition fault test
Author :
Tseng, Chao-Wen ; McCluskey, Edward J.
Author_Institution :
Center for Reliable Comput., Stanford Univ., CA, USA
Abstract :
The test results of eight "challenge" Murphy chips that escaped either at least one of the 100% single stuck-at fault test sets or the 100% transition fault test set were analyzed. The results show that: (1) an input pattern sequence is needed to detect the defects in the eight chips; (2) the detection of a transition fault depends on the outputs at which it is observed; (3) a transition fault test set is more effective if each transition fault is detected more than once. A transition fault test set, TARO, in which each Transition fault is propagated to All the Reachable Outputs, is created and the experimental results are presented. The TARO test set detected all the eight "challenge" Murphy chips
Keywords :
automatic test pattern generation; fault diagnosis; integrated circuit testing; logic testing; sequences; timing; ATPG tools; TARO test set; challenge Murphy chips; input pattern sequence; multiple-output propagation transition fault test; single stuck-at fault test sets; transition fault test set; Chaos; Circuit faults; Circuit simulation; Circuit testing; Clocks; Cyclic redundancy check; Delay; Fault detection; Logic; Timing;
Conference_Titel :
Test Conference, 2001. Proceedings. International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-7169-0
DOI :
10.1109/TEST.2001.966652
