DocumentCode :
1914010
Title :
Crosstalk test generation on pseudo industrial circuits: a case study
Author :
Chen, Liang-Chi ; Mak, T.M. ; Breuer, Melvin A. ; Gupta, Suneet K.
Author_Institution :
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
fYear :
2001
fDate :
2001
Firstpage :
548
Lastpage :
557
Abstract :
In this paper, we present data that validates the viability of a university prototype crosstalk ATPG system, XGEN, on real designs. We remodeled Intel circuits and performed test generation using actual parasitic data. A crosstalk ATPG implementation flow was developed based on Intel tools. Validation results are shown for the modified circuits. Critical issues for preserving accurate timing information and capturing crosstalk effects are discussed
Keywords :
automatic test equipment; automatic test pattern generation; automatic test software; crosstalk; integrated circuit testing; production testing; timing; ATPG validation; Intel tools; XGEN university prototype crosstalk ATPG system; accurate timing information; crosstalk ATPG implementation flow; crosstalk effects capture; crosstalk test generation; modified circuits; parasitic data; pseudo industrial circuits; remodeled Intel circuits; test generation; Accuracy; Automatic test pattern generation; CMOS logic circuits; Circuit testing; Computer aided software engineering; Coupling circuits; Crosstalk; Delay effects; Semiconductor device modeling; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2001. Proceedings. International
Conference_Location :
Baltimore, MD
ISSN :
1089-3539
Print_ISBN :
0-7803-7169-0
Type :
conf
DOI :
10.1109/TEST.2001.966673
Filename :
966673
Link To Document :
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