DocumentCode :
1914180
Title :
Selective CVD TiSi2 for Sub-0.5 μm N+/P+ CMOS Devices
Author :
Haond, M. ; Regolini, J.L.
Author_Institution :
Centre Nat. d´´Etude des Telecommun., FRANCE TELECOM, Meylan, France
fYear :
1993
fDate :
13-16 Sept. 1993
Firstpage :
485
Lastpage :
488
Abstract :
We have used a new selective CVD TiSi2 in an advanced CMOS process. Subhalf-micron transistors have been characterised, with results equivalent to devices made with more conventional salicide. Ring oscillators with typical gate delay times have been fabricated. Finally, fully functional 16K SRAMS and 350 KT ASICs have been fabricated, which indicates the possibility of using this new process for future VLSI.
Keywords :
CMOS memory circuits; SRAM chips; VLSI; application specific integrated circuits; chemical vapour deposition; oscillators; ASIC; N-P CMOS devices; SRAM; VLSI; advanced CMOS process; gate delay times; ring oscillators; salicide; selective CVD; size 0.5 mum; subhalf-micron transistors; Boron; CMOS process; Inductors; MOS devices; MOSFETs; Random access memory; Ring oscillators; Substrates; Telecommunications; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1993. ESSDERC '93. 23rd European
Conference_Location :
Grenoble
Print_ISBN :
2863321358
Type :
conf
Filename :
5435549
Link To Document :
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