On efficient error diagnosis of digital circuits

The rising trend in large scale integration and design complexity has greatly increased the need for efficient design error diagnosis. We present techniques for fast and efficient error diagnosis of digital circuits by eliminating to a large extent the set of false candidates identified by the diagnosis. The elimination of false candidate regions is conducted via distinguishing X´s, flipping of values at the output of candidate regions, and combination of these techniques. The algorithms help to improve both the speed and resolution of error diagnosis. Experimental results on combinational benchmark circuits showed that up to 92% improvement in diagnostic resolution and 74% speedup over the original region-based diagnosis can be achieved with our approaches