Compact small-signal model for RF FinFETs

Author

Alvarado, J. ; Tinoco, J.C. ; Kilchytska, V. ; Flandre, D. ; Raskin, J. -P ; Cerdeira, A. ; Contreras, E.

Author_Institution

Depto. de I. en Telecomun., UNAM, Mexico City, Mexico

fYear

2012

fDate

14-17 March 2012

Firstpage

1

Lastpage

4

Abstract

Modeling of the small-signal equivalent circuit of SOI FinFETs through SPICE simulations is presented. A compact model implemented in Verilog-A predicts well the DC characteristics of RF SOI FinFETs and allows the extraction of the intrinsic conductance, transconductance and capacitances at any selected operating point. The intrinsic small-signal equivalent circuit composed of those extracted lumped elements is used in SPICE simulator. This paper compares the parameters extracted from both DC and wideband S-parameter methods.

Keywords

MOSFET; SPICE; silicon-on-insulator; RF FinFET; RF SOI FinFET; SPICE simulation; SPICE simulator; Verilog-A; capacitance; compact model; compact small-signal model; intrinsic conductance; intrinsic small-signal equivalent circuit; transconductance; wideband S-parameter method; Capacitance; Equivalent circuits; FinFETs; Integrated circuit modeling; Logic gates; Numerical models; Radio frequency; Compact model; FinFETs; SOI; Verilog-A; capacitances; extraction technique;

fLanguage

English

Publisher

ieee

Conference_Titel

Devices, Circuits and Systems (ICCDCS), 2012 8th International Caribbean Conference on

Conference_Location

Playa del Carmen

Print_ISBN

978-1-4577-1116-9

Electronic_ISBN

978-1-4577-1115-2

Type

conf

DOI

10.1109/ICCDCS.2012.6188936

Filename

6188936