DocumentCode
1914772
Title
A new approach to fault emulation
Author
Sedaghat-Maman, Reza ; Barke, Erich
Author_Institution
Inst. of Microelectron. Syst., Hannover Univ., Germany
fYear
1997
fDate
24-26 Jun 1997
Firstpage
173
Lastpage
179
Abstract
Presents a hardware-based approach to fault emulation without a dedicated logic emulation system. Logic is introduced for fault injection in a targeted circuit. The logic emulator is expanded with additional hardware modules required for the fault emulation process. This method simulates the stuck-at fault model and may also be used for multiple faults and bridging faults. The implementation discussed in this paper is only for SSFs (single stuck-at faults). When tested on combinational circuits using a commercial emulator, speeds varying from a few kHz to several MHz were reached. The efficiency of this form of fault injection is illustrated by the experimental results presented in this paper
Keywords
circuit analysis computing; combinational circuits; fault diagnosis; logic CAD; logic testing; bridging faults; combinational circuits; commercial emulator; efficiency; fault injection; hardware modules; hardware-based fault emulation; logic emulator; multiple faults; single stuck-at faults; speeds; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Electrical fault detection; Emulation; Fault detection; Hardware; Logic circuits; Shift registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Rapid System Prototyping, 1997. Shortening the Path from Specification to Prototype. Proceedings., 8th IEEE International Workshop on
Conference_Location
Chapel Hill, NC
ISSN
1074-6005
Print_ISBN
0-8186-8064-4
Type
conf
DOI
10.1109/IWRSP.1997.618894
Filename
618894
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