• DocumentCode
    1916228
  • Title

    Speedup stacks: Identifying scaling bottlenecks in multi-threaded applications

  • Author

    Eyerman, Stijn ; Du Bois, Kristof ; Eeckhout, Lieven

  • Author_Institution
    ELIS Dept., Ghent Univ., Ghent, Belgium
  • fYear
    2012
  • fDate
    1-3 April 2012
  • Firstpage
    145
  • Lastpage
    155
  • Abstract
    Multi-threaded workloads typically show sublinear speedup on multi-core hardware, i.e., the achieved speedup is not proportional to the number of cores and threads. Sublinear scaling may have multiple causes, such as poorly scalable synchronization leading to spinning and/or yielding, and interference in shared resources such as the last-level cache (LLC) as well as the main memory subsystem. It is vital for programmers and processor designers to understand scaling bottlenecks in existing and emerging workloads in order to optimize application performance and design future hardware. In this paper, we propose the speedup stack, which quantifies the impact of the various scaling delimiters on multi-threaded application speedup in a single stack. We describe a mechanism for computing speedup stacks on a multi-core processor, and we find speedup stacks to be accurate within 5.1% on average for sixteen-threaded applications. We present several use cases: we discuss how speedup stacks can be used to identify scaling bottlenecks, classify benchmarks, optimize performance, and understand LLC performance.
  • Keywords
    cache storage; multi-threading; multiprocessing systems; LLC performance; last-level cache; main memory subsystem; multicore hardware; multicore processor; multithreaded application; multithreaded workload; scaling bottleneck identification; scaling delimiter; sixteen-threaded application; speedup stack; sublinear scaling; sublinear speedup; Hardware; Instruction sets; Interference; Multicore processing; Resource management; Spinning; Synchronization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Performance Analysis of Systems and Software (ISPASS), 2012 IEEE International Symposium on
  • Conference_Location
    New Brunswick, NJ
  • Print_ISBN
    978-1-4673-1143-4
  • Electronic_ISBN
    978-1-4673-1145-8
  • Type

    conf

  • DOI
    10.1109/ISPASS.2012.6189221
  • Filename
    6189221